<HTML><HEAD><TITLE>Formal Verification Report</TITLE></HEAD>
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<H1 align=center>SD Controller Formal Verification Report</H1>
<H2 align=center>20250423</H2>
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<TR><TH>Status</TH><TH>Component</TD><TH>Proof</TH><TH>Component description</TH></TR>
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<TR><TD bgcolor=#caeec8>7 Cover points</TD><TD>llsdspi</TD><TD>_cvr</TD><TD rowspan=5>Low-Level SPI handler</TD></TR>
<TR><TD bgcolor=#caeec8>7 Cover points</TD><TD>llsdspi</TD><TD>_cvra</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prfc</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prfa</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>llsdspi</TD><TD>_prf</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfds</TD><TD rowspan=5>SDIO AXI-Lite Bus handler</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prf</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdma</TD></TR>
<TR><TD bgcolor=#caeec8>18 Cover points</TD><TD>sdaxil</TD><TD>_cvr</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdaxil</TD><TD>_prfdr</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prf</TD><TD rowspan=6>SDIO Divided clock generator</TD></TR>
<TR><TD bgcolor=#caeec8>12 Cover points</TD><TD>sdckgen</TD><TD>_cvrd</TD></TR>
<TR><TD bgcolor=#caeec8>9 Cover points</TD><TD>sdckgen</TD><TD>_cvr</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prf8</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdckgen</TD><TD>_prfd</TD></TR>
<TR><TD bgcolor=#caeec8>14 Cover points</TD><TD>sdckgen</TD><TD>_cvr8</TD></TR>
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<TR><TD bgcolor=#caeec8>8 Cover points</TD><TD>sdcmd</TD><TD>_cvr</TD><TD rowspan=3>SDIO CMD wire controller</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdcmd</TD><TD>_prfds</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdcmd</TD><TD>_prf</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prf</TD><TD rowspan=5>SDIO receive data handler</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prfs4</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prfs</TD></TR>
<TR><TD bgcolor=#caeec8>25 Cover points</TD><TD>sdrxframe</TD><TD>_cvr</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdrxframe</TD><TD>_prf4</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdspi</TD><TD>_prf</TD><TD rowspan=1>SDSPI Top level controller</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prfs</TD><TD rowspan=6>SDIO transmit data controller</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prf4</TD></TR>
<TR><TD bgcolor=#caeec8>12 Cover points</TD><TD>sdtxframe</TD><TD>_cvr</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prfs4</TD></TR>
<TR><TD bgcolor=#caeec8>43 Cover points</TD><TD>sdtxframe</TD><TD>_cvrs</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdtxframe</TD><TD>_prf</TD></TR>
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<TR><TD bgcolor=#caeec8>19 Cover points</TD><TD>sdwb</TD><TD>_cvr</TD><TD rowspan=5>SDIO Wishbone Bus handler</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfds</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prf</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfdma</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>sdwb</TD><TD>_prfdr</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>spicmd</TD><TD>_prf</TD><TD rowspan=2>SPI Command processor</TD></TR>
<TR><TD bgcolor=#caeec8>11 Cover points</TD><TD>spicmd</TD><TD>_cvr</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>spirxdata</TD><TD>_prf</TD><TD rowspan=3>SPI Data receive handler</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spirxdata</TD><TD>_prfle</TD></TR>
<TR><TD bgcolor=#caeec8>16 Cover points</TD><TD>spirxdata</TD><TD>_cvr</TD></TR>
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<TR><TD bgcolor=#caeec8>Pass</TD><TD>spitxdata</TD><TD>_prfle</TD><TD rowspan=3>SPI Data transmit handler</TD></TR>
<TR><TD bgcolor=#caeec8>Pass</TD><TD>spitxdata</TD><TD>_prf</TD></TR>
<TR><TD bgcolor=#caeec8>13 Cover points</TD><TD>spitxdata</TD><TD>_cvr</TD></TR>
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